{"created":"2023-06-19T09:12:47.887329+00:00","id":24693,"links":{},"metadata":{"_buckets":{"deposit":"4b11141b-e9ec-48d2-a94c-f3dc4f04a6ee"},"_deposit":{"created_by":1,"id":"24693","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"24693"},"status":"published"},"_oai":{"id":"oai:kumadai.repo.nii.ac.jp:00024693","sets":["426:428"]},"author_link":["165152","147017","147016","147018"],"item_16_alternative_title_22":{"attribute_name":"その他の言語のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"Improvement of Execution Efficiency by Applying Unitable PE Architecture for MX Core"}]},"item_16_alternative_title_23":{"attribute_name":"タイトル（ヨミ）","attribute_value_mlt":[{"subitem_alternative_title":"MXコア ニ オケル PE リュウド ヘンコウ ニ ヨル ジッコウ コウリツ ノ カイゼン"}]},"item_16_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2009-01-22","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"7","bibliographicPageEnd":"74","bibliographicPageStart":"69","bibliographicVolumeNumber":"2009","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告. SLDM, [システムLSI設計技術]"}]}]},"item_16_creator_3":{"attribute_name":"別言語の著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Mizokami, Yuta"}],"nameIdentifiers":[{"nameIdentifier":"147016","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Nakano, Mitsutaka"}],"nameIdentifiers":[{"nameIdentifier":"147017","nameIdentifierScheme":"WEKO"}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"飯田, 全広","creatorNameLang":"ja"},{"creatorName":"イイダ, マサヒロ","creatorNameLang":"ja-Kana"},{"creatorName":"Iida, Masahiro","creatorNameLang":"en"}],"familyNames":[{"familyName":"飯田","familyNameLang":"ja"},{"familyName":"イイダ","familyNameLang":"ja-Kana"},{"familyName":"Iida","familyNameLang":"en"}],"givenNames":[{"givenName":"全広","givenNameLang":"ja"},{"givenName":"マサヒロ","givenNameLang":"ja-Kana"},{"givenName":"Masahiro","givenNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"147018","nameIdentifierScheme":"WEKO"}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"Sueyoshi, Toshinori","creatorNameLang":"en"},{"creatorName":"末吉, 敏則","creatorNameLang":"ja"},{"creatorName":"スエヨシ, トシノリ","creatorNameLang":"ja-Kana"}],"familyNames":[{"familyName":"Sueyoshi","familyNameLang":"en"},{"familyName":"末吉","familyNameLang":"ja"},{"familyName":"スエヨシ","familyNameLang":"ja-Kana"}],"givenNames":[{"givenName":"Toshinori","givenNameLang":"en"},{"givenName":"敏則","givenNameLang":"ja"},{"givenName":"トシノリ","givenNameLang":"ja-Kana"}],"nameIdentifiers":[{"nameIdentifier":"165152","nameIdentifierScheme":"WEKO"}]}]},"item_16_description_17":{"attribute_name":"フォーマット","attribute_value_mlt":[{"subitem_description":"application/pdf","subitem_description_type":"Other"}]},"item_16_description_46":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"subitem_description":"論文(Article)","subitem_description_type":"Other"}]},"item_16_description_5":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"MXコアは細粒度の演算器(Prpcessing Element: PE)を複数搭載した超並列SIMD (Single Instruction Multiple Data)型プロセッサである.MXコアは細粒度PEを超並列に動作させることでピーク性能を高めている.よって,その性能はPEの稼働状況(並列度)に依存する.一方,アプリケーションは一般に演算データのサイズや処理内容によって演算並列度は一定ではないため,常にすべてのPEで処理を行えるわけではない.本稿では,並列度の低いアプリケーションにおいてPEの稼働率を向上させる手法として,演算粒度を変更可能なPEアーキテクチャを提案する.提案アーキテクチャをRSA暗号に適用した結果,従来アーキテクチャと比較して34%の性能改善が得られた.","subitem_description_type":"Other"},{"subitem_description":"MX-Core is a massively parallel SIMD (Single Instruction Multiple Data) type processor which have fine-grained computing units (PE). The performance of MX-Core depends on the utilization rate of PEs. Therefore, it is necessary to achieve a high operational perfomance that it operate with high parallelism. However, the instruction level parallelism depends on applications or processing, which is cause of performance deterioration in MX-Core. In this study, we proposed the unitable PE architecture. This architecture solves the parallelism problem of application. As a result, as compared with traditional architecture, the proposed architecture to RSA cryptography improves performance by 34%.","subitem_description_type":"Other"}]},"item_16_description_77":{"attribute_name":"URL","attribute_value_mlt":[{"subitem_description":"http://ci.nii.ac.jp/naid/110007131408","subitem_description_type":"Other"}]},"item_16_publisher_36":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"一般社団法人情報処理学会"}]},"item_16_relation_16":{"attribute_name":"情報源(ISSN)","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"09196072"}]}]},"item_16_rights_12":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"一般社団法人情報処理学会"}]},"item_16_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_16_subject_20":{"attribute_name":"日本十進分類法","attribute_value_mlt":[{"subitem_subject":"548","subitem_subject_scheme":"NDC"}]},"item_16_text_18":{"attribute_name":"形態","attribute_value_mlt":[{"subitem_text_value":"702707 bytes"}]},"item_16_text_47":{"attribute_name":"資源タイプ・ローカル","attribute_value_mlt":[{"subitem_text_value":"雑誌掲載論文"}]},"item_16_text_48":{"attribute_name":"資源タイプ・NII","attribute_value_mlt":[{"subitem_text_value":"Journal Article"}]},"item_16_text_49":{"attribute_name":"資源タイプ・DCMI","attribute_value_mlt":[{"subitem_text_value":"text"}]},"item_16_text_50":{"attribute_name":"資源タイプ・ローカル表示コード","attribute_value_mlt":[{"subitem_text_value":"01"}]},"item_16_text_78":{"attribute_name":"コメント","attribute_value_mlt":[{"subitem_text_value":"本文データは学協会の許諾に基づきCiNiiから複製したものである"}]},"item_16_version_type_19":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"溝上, 雄太"}],"nameIdentifiers":[{"nameIdentifier":"147016","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"中野, 光臣"}],"nameIdentifiers":[{"nameIdentifier":"147017","nameIdentifierScheme":"WEKO"}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"飯田, 全広","creatorNameLang":"ja"},{"creatorName":"イイダ, マサヒロ","creatorNameLang":"ja-Kana"},{"creatorName":"Iida, Masahiro","creatorNameLang":"en"}],"familyNames":[{"familyName":"飯田","familyNameLang":"ja"},{"familyName":"イイダ","familyNameLang":"ja-Kana"},{"familyName":"Iida","familyNameLang":"en"}],"givenNames":[{"givenName":"全広","givenNameLang":"ja"},{"givenName":"マサヒロ","givenNameLang":"ja-Kana"},{"givenName":"Masahiro","givenNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"147018","nameIdentifierScheme":"WEKO"}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"Sueyoshi, Toshinori","creatorNameLang":"en"},{"creatorName":"末吉, 敏則","creatorNameLang":"ja"},{"creatorName":"スエヨシ, トシノリ","creatorNameLang":"ja-Kana"}],"familyNames":[{"familyName":"Sueyoshi","familyNameLang":"en"},{"familyName":"末吉","familyNameLang":"ja"},{"familyName":"スエヨシ","familyNameLang":"ja-Kana"}],"givenNames":[{"givenName":"Toshinori","givenNameLang":"en"},{"givenName":"敏則","givenNameLang":"ja"},{"givenName":"トシノリ","givenNameLang":"ja-Kana"}],"nameIdentifiers":[{"nameIdentifier":"165152","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-03-02"}],"displaytype":"detail","filename":"110007131408.pdf","filesize":[{"value":"702.7 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"110007131408.pdf","url":"https://kumadai.repo.nii.ac.jp/record/24693/files/110007131408.pdf"},"version_id":"aebd5a45-ca8c-46de-97d2-fd7211a56d7b"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"MXコア","subitem_subject_scheme":"Other"},{"subitem_subject":"SIMD","subitem_subject_scheme":"Other"},{"subitem_subject":"粒度","subitem_subject_scheme":"Other"},{"subitem_subject":"MX core","subitem_subject_scheme":"Other"},{"subitem_subject":"granularity","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"MXコアにおけるPE粒度変更による実行効率の改善(コンピュータシステム技術,FPGA応用及び一般)","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"MXコアにおけるPE粒度変更による実行効率の改善(コンピュータシステム技術,FPGA応用及び一般)"}]},"item_type_id":"16","owner":"1","path":["428"],"pubdate":{"attribute_name":"公開日","attribute_value":"2011-05-12"},"publish_date":"2011-05-12","publish_status":"0","recid":"24693","relation_version_is_last":true,"title":["MXコアにおけるPE粒度変更による実行効率の改善(コンピュータシステム技術,FPGA応用及び一般)"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2023-08-24T02:43:35.782237+00:00"}