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MXコアにおけるPE粒度変更による実行効率の改善(コンピュータシステム技術,FPGA応用及び一般)
http://hdl.handle.net/2298/18798
http://hdl.handle.net/2298/187987186cc5a-d810-49c1-83ac-ec1b447af37e
名前 / ファイル | ライセンス | アクション |
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110007131408.pdf (702.7 kB)
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Item type | 学術雑誌論文 / Journal Article(1) | |||||
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公開日 | 2011-05-12 | |||||
タイトル | ||||||
タイトル | MXコアにおけるPE粒度変更による実行効率の改善(コンピュータシステム技術,FPGA応用及び一般) | |||||
言語 | ||||||
言語 | jpn | |||||
キーワード | ||||||
主題 | MXコア, SIMD, 粒度, MX core, granularity | |||||
資源タイプ | ||||||
資源タイプ | journal article | |||||
著者 |
溝上, 雄太
× 溝上, 雄太× 中野, 光臣× 飯田, 全広× 末吉, 敏則 |
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別言語の著者 |
Mizokami, Yuta
× Mizokami, Yuta× Nakano, Mitsutaka× 飯田, 全広× 末吉, 敏則 |
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内容記述 | ||||||
内容記述 | MXコアは細粒度の演算器(Prpcessing Element: PE)を複数搭載した超並列SIMD (Single Instruction Multiple Data)型プロセッサである.MXコアは細粒度PEを超並列に動作させることでピーク性能を高めている.よって,その性能はPEの稼働状況(並列度)に依存する.一方,アプリケーションは一般に演算データのサイズや処理内容によって演算並列度は一定ではないため,常にすべてのPEで処理を行えるわけではない.本稿では,並列度の低いアプリケーションにおいてPEの稼働率を向上させる手法として,演算粒度を変更可能なPEアーキテクチャを提案する.提案アーキテクチャをRSA暗号に適用した結果,従来アーキテクチャと比較して34%の性能改善が得られた. | |||||
内容記述 | ||||||
内容記述 | MX-Core is a massively parallel SIMD (Single Instruction Multiple Data) type processor which have fine-grained computing units (PE). The performance of MX-Core depends on the utilization rate of PEs. Therefore, it is necessary to achieve a high operational perfomance that it operate with high parallelism. However, the instruction level parallelism depends on applications or processing, which is cause of performance deterioration in MX-Core. In this study, we proposed the unitable PE architecture. This architecture solves the parallelism problem of application. As a result, as compared with traditional architecture, the proposed architecture to RSA cryptography improves performance by 34%. | |||||
書誌情報 |
情報処理学会研究報告. SLDM, [システムLSI設計技術] 巻 2009, 号 7, p. 69-74, 発行年 2009-01-22 |
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書誌レコードID | ||||||
収録物識別子 | AA11451459 | |||||
権利 | ||||||
権利情報 | 一般社団法人情報処理学会 | |||||
情報源(ISSN) | ||||||
関連名称 | 09196072 | |||||
フォーマット | ||||||
内容記述 | application/pdf | |||||
形態 | ||||||
702707 bytes | ||||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
日本十進分類法 | ||||||
主題 | 548 | |||||
その他の言語のタイトル | ||||||
その他のタイトル | Improvement of Execution Efficiency by Applying Unitable PE Architecture for MX Core | |||||
タイトル(ヨミ) | ||||||
その他のタイトル | MXコア ニ オケル PE リュウド ヘンコウ ニ ヨル ジッコウ コウリツ ノ カイゼン | |||||
出版者 | ||||||
出版者 | 一般社団法人情報処理学会 | |||||
資源タイプ | ||||||
内容記述 | 論文(Article) | |||||
資源タイプ・ローカル | ||||||
雑誌掲載論文 | ||||||
資源タイプ・NII | ||||||
Journal Article | ||||||
資源タイプ・DCMI | ||||||
text | ||||||
資源タイプ・ローカル表示コード | ||||||
01 | ||||||
URL | ||||||
内容記述 | http://ci.nii.ac.jp/naid/110007131408 | |||||
コメント | ||||||
本文データは学協会の許諾に基づきCiNiiから複製したものである |